Workshop on Modeling, Benchmarking and Simulation


MoBS 2005


Held in conjunction with the 32nd Annual International Symposium on Computer Architecture


Saturday June 4, 2005




Modeling • Benchmarking • Simulation •









Advance Program (Updated on 08/10/05 with papers)

Proceedings (pdf)



With few exceptions, simulation is the quantitative foundation for virtually all computer architecture research and design projects – from microarchitectural exploration to hardware and software trade-offs to processor and system design.  However, its continued efficacy is limited by problems such as increasing complexity, additional critical constraints (e.g. power consumption, reliability, etc.), an ever expanding design space, benchmark suite quality and coverage, and radical changes in processor architectures to compensate for technological changes (i.e. reduced transistor widths, etc.).


The primary goals of this workshop are to accelerate the development of simulation technologies that are necessary to support the research of future generation architectures and to encourage the advancement of “under-researched” areas related to computer architecture measurement, such as modeling; benchmark implementation and benchmark suite construction; and formal methods of design space exploration and performance analysis.


Topics of interest include, but are not limited to:


·        New or efficient techniques to model performance, power, reliability, etc.

·        Accurate but efficient alternatives to cycle-accurate, execution-driven simulation

·        Simulator verification, flexibility and reusability

·        Reduced simulation time techniques

·        Efficient design space exploration

·        Development of parameterizable, flexible benchmarks

·        Formal methods for benchmark suite construction or benchmark suite sub-setting

·        Techniques to measure the characteristics (weak spots, coverage, etc.) of a benchmark suite

·        Analytical and statistical processor modeling

·        Choosing processor and memory simulation parameters


Submission Guidelines


The authors should submit a 200 word or less abstract by 11:59 PM (CST) March 28, 2005.  The full paper should be 5000 words or less and should be submitted in pdf format by 11:59 PM (CDT) April 4, 2005.  Both the abstract and the full paper can be submitted to Lieven Eeckhout ( through email. Papers that are excessively long may be rejected without review.


Important Dates


Abstract Submission:            March 28, 2005

Full Paper Submission:         April 4, 2005

Notification Date:                May 4, 2005

Final Version Due:               May 18, 2005

Workshop Date:                   June 4, 2005


Workshop Co-Organizers


Lieven Eeckhout, Ghent University (

Joshua J. Yi, Freescale Semiconductor (


Program Committee


David I. August, Princeton University

Pradip Bose, IBM Research T.J. Watson

Brad Calder, University of California, San Diego

Lizy Kurian John, University of Texas at Austin

David J. Lilja, University of Minnesota at Twin Cities

Peter Magnusson, Virtutech

Jim Smith, University of WisconsinMadison


Call For Papers