Workshop on
Modeling, Benchmarking and Simulation
http://www.arctic.umn.edu/MoBS
Held in conjunction with the 32nd Annual International
Symposium on Computer Architecture
With few exceptions, simulation is the
quantitative foundation for virtually all computer architecture research and
design projects – from microarchitectural exploration to hardware and software trade-offs
to processor and system design. However,
its continued efficacy is limited by problems such as increasing complexity,
additional critical constraints (e.g.
power consumption, reliability, etc.),
an ever expanding design space, benchmark suite quality and coverage, and
radical changes in processor architectures to compensate for technological
changes (i.e. reduced transistor
widths, etc.).
The primary goals of this workshop are to
accelerate the development of simulation technologies that are necessary to
support the research of future generation architectures and to encourage the
advancement of “under-researched” areas related to computer architecture
measurement, such as modeling; benchmark implementation and benchmark suite
construction; and formal methods of design space exploration and performance
analysis.
Topics of interest include, but are not limited
to:
·
New or efficient techniques to model performance, power,
reliability, etc.
·
Accurate but efficient alternatives to cycle-accurate,
execution-driven simulation
·
Simulator verification, flexibility and reusability
·
Reduced simulation time techniques
·
Efficient design space exploration
·
Development of parameterizable,
flexible benchmarks
·
Formal methods for benchmark suite construction or
benchmark suite sub-setting
·
Techniques to measure the characteristics (weak spots,
coverage, etc.) of a benchmark suite
·
Analytical and statistical processor modeling
·
Choosing processor and memory simulation parameters
Submission Guidelines
The authors should submit a 200 word or less
abstract by
Important Dates
Abstract
Submission:
Full
Paper Submission:
Notification
Date:
Final
Version Due:
Workshop Date: June 4, 2005
Workshop Co-Organizers
Lieven Eeckhout,
Joshua J. Yi, Freescale Semiconductor (jjyi@ece.umn.edu)
Program Committee
David I. August,
Pradip Bose, IBM
Research T.J. Watson
Brad Calder,
Lizy Kurian John,
David J. Lilja,
Peter Magnusson, Virtutech
Jim Smith,
Call For Papers