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*									       *
*           MoBS: Workshop on Modeling, Benchmarking, and Simulation	       *
*		      http://www.arctic.umn.edu/~jjyi/MoBS		       *
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	  		  Held in conjunction with the
	  33rd Annual International Symposium on Computer Architecture

			     Boston, Massachusetts
				June 18, 2006


Overview:
=========
With few exceptions, simulation is the quantitative foundation for virtually all 
computer architecture research and design projects – from microarchitectural 
exploration to hardware and software trade-offs to processor and system design.  
However, its continued efficacy is limited by problems such as increasing 
complexity, additional critical constraints (e.g. power consumption, reliability, 
etc.), an ever expanding design space, benchmark suite quality and coverage, and 
radical changes in processor architectures to compensate for technological 
changes (i.e. reduced transistor widths, etc.). 

The primary goals of this workshop are to accelerate the development of 
simulation technologies that are necessary to support the research of future 
generation architectures – in particular, processors built with nanotechnology 
– and to encourage the advancement of “under-researched” areas in computer 
architecture measurement, such as multiprocessor simulation methodology; 
modeling; benchmark implementation and benchmark suite construction; and formal 
methods of design space exploration and performance analysis.

Topics of interest include, but are not limited to:

* New or efficient techniques to model performance, power, reliability, etc.
* Reduced simulation time techniques
* Simulation methodologies for multiprocessor simulation 
* Development of parameterizable, flexible benchmarks
* Formal methods for benchmark suite construction or benchmark suite sub-setting
* Techniques to measure the characteristics (dissimilarity, coverage, etc.) of a 
  benchmark suite
* Efficient processor modeling techniques
* Alternatives to cycle-accurate, execution-driven simulation
* Statistically-rigorous performance analysis techniques
* Analytical and statistical models

This workshop places a special premium on novelty and on preliminary work.


Submission Guidelines:
======================
The authors should submit a 200 word or less abstract by 11:59 PM (CST) March
30, 2006.  The full paper should be 5000 words or less and be submitted in pdf 
format by 11:59 PM (CDT) April 3, 2006.  See workshop website for submission 
instructions.  Papers that are excessively long may be rejected without review.


Important Dates:
================
Abstract Submission:	March 30, 2006
Full Paper Submission:	April 3, 2006
Notification Date:	May 1, 2006
Final Version Due:	May 22, 2006
Workshop Date:		June 18, 2006


Co-Organizers and Program Co-Chairs:
====================================
Lieven Eeckhout, Ghent University (leeckhou@elis.ugent.be)
Joshua J. Yi, Freescale Semiconductor (jjyi@ece.umn.edu)


Program Committee:
==================
David I. August, Princeton University
Pradip Bose, IBM Research T.J. Watson
Brad Calder, University of California at San Diego
Kevin Lepak, AMD
Gabriel Loh, Georgia Tech 
Peter S. Magnusson, Virtutech 
Gokhan Memik, Northwestern University
Resit Sendag, University of Rhode Island
Tim Sherwood, University of California, Santa Barbara
Kevin Skadron, University of Virginia
Olivier Temam, INRIA