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*									       *
*                               Call for Papers                                * 
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*           MoBS: Workshop on Modeling, Benchmarking, and Simulation	       *
*		      http://www-mount.ece.umn.edu/~jjyi/MoBS		       *
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	  		  Held in conjunction with the
	  35th Annual International Symposium on Computer Architecture

                                Beijing, China
				 June 22, 2008

Overview:
=========
With few exceptions, simulation is the quantitative foundation for virtually all computer architecture research and design projects – from microarchitectural exploration to hardware and software trade-offs to processor and system design.  However, its continued efficacy is limited by the need to model or compensate for problems such as increasing complexity (e.g., multiple cores and peripherals), additional critical constraints (e.g., power consumption, reliability, etc.), an ever expanding design space, and benchmark suite quality and coverage.

Accordingly, the goals of this workshop are to accelerate the development of technologies that are necessary to support the research of future generation architectures and to encourage the advancement of “under-researched” areas in computer architecture measurement. Accordingly, this workshop places a special premium on novelty and on preliminary work. Topics of interest include, but are not limited to:

* Performance/energy/temperature/reliability measurement and analysis tools
* New or efficient techniques to model performance, power, temperature, reliability, etc.
* Simulation methodologies for multi-core and many-core architectures
* Development of parameterizable, flexible benchmarks
* Techniques to measure the characteristics (dissimilarity, coverage, etc.) of a benchmark suite
* Efficient processor modeling techniques
* Statistically-rigorous performance analysis techniques
* Analytical and statistical models

This year, MoBS 2008 places a special emphasis on cutting-edge research on simulation tools, and modeling and benchmarking in emerging areas, such as FPGA-based simulation, security, process variation, 3D die stacking, synthetic benchmarks, transactional memory, virtualization, debugging, etc.

Accepted workshop papers may be published in a special “Best of ISCA 2008 Workshops” issue.


Submission Guidelines:
======================
The full paper should be no more than 10 pages in a double-column format and be submitted in pdf format by April 11, 2008.  Both the abstract and the full paper can be submitted to Lieven Eeckhout (lieven.eeckhout@elis.ugent.be) through email.  Excessively long papers may be rejected without review.


Important Dates:
================
Paper Submission:	April 11, 2008 
Notification Date:	May 16, 2008
Final Version Due:	June 1, 2008
Workshop Date:		June 22, 2008


Co-Organizers and Program Co-Chairs:
====================================
Lieven Eeckhout, Ghent University (leeckhou@elis.ugent.be)
Joshua J. Yi, Freescale Semiconductor (jjyi@ece.umn.edu)


Program Committee:
==================
Michael Adler, Intel
David Brooks, Harvard University
Derek Chiou, University of Texas at Austin
David Kaeli, Northeastern University
Gabriel Loh, Georgia Tech University
Ravi Nair, IBM
Olivier Temam, INRIA
Thomas Wenisch, University of Michigan