******************************************************************************** * * * Call for Papers * * * * MoBS: Workshop on Modeling, Benchmarking, and Simulation * * http://www-mount.ece.umn.edu/~jjyi/MoBS * * * ******************************************************************************** Held in conjunction with the 36th Annual International Symposium on Computer Architecture Austin, Texas June 21, 2009 Overview: ========= With few exceptions, simulation is the quantitative foundation for virtually all computer architecture research and design projects from microarchitectural exploration to hardware and software trade-offs to processor and system design. However, its continued efficacy is limited by the need to model or compensate for problems such as increasing complexity (e.g., multiple cores and peripherals), additional critical constraints (e.g., power consumption, reliability, etc.), an ever-expanding design space (e.g., chip, system, and data center scale modeling), and benchmark suite quality and coverage. Accordingly, the goals of this workshop are to accelerate the development of technologies that are necessary to support the research of future generation architectures and to encourage the advancement of under-researched areas in computer architecture measurement. Accordingly, this workshop places a special premium on novelty and on preliminary work. Topics of interest include, but are not limited to: * System-level architecture modeling and measurement * Data center level modeling and measurement * Performance/energy/temperature/reliability measurement and analysis tools * New or efficient techniques to model performance, power, temperature, reliability, etc. * Simulation methodologies for multi-core and many-core architectures * Development of parameterizable, flexible benchmarks * New benchmark suites for emerging application areas * Analytical and statistical modeling * Performance/energy/temperature/reliability measurement and analysis tools The special emphasis of MoBS-5 will be on system level architecture, data center level issues, enterprise-scale benchmarks, and tools submissions in this area will be especially encouraged. Submission Guidelines: ====================== The full paper should be no more than 10 pages in a double-column format and be submitted in pdf format by April 17, 2009. Papers should be submitted to Lieven Eeckhout (leeckhou@elis.ugent.be) via e-mail. Important Dates: ================ Paper Submission: April 24, 2009 Notification Date: May 13, 2009 Final Version Due: June 1, 2009 Workshop Date: June 21, 2009 Co-Organizers and Program Co-Chairs: ==================================== Lieven Eeckhout, Ghent University (leeckhou@elis.ugent.be) Thomas Wenisch, University of Michigan (twenisch@umich.edu) Joshua J. Yi, Freescale Semiconductor (jjyi@ece.umn.edu) Program Committee: ================== Alaa Alameldeen, Intel Nathan Binkert, Hewlett-Packard Derek Chiou, University of Texas at Austin Paolo Faraboschi, Hewlett-Packard Tejas Karkhanis, IBM Research Benjamin Lee, Microsoft Charles Lefurgy, IBM Research Margaret Martonosi, Princeton University David Penry, Brigham Young University Suzanne Rivoire, Sonoma State University