The Spatial Characteristics of Load Instructions in the SPEC 95 and SPEC 2000 Benchmarks


Joshua J. Yi, Resit Sendag, and David J. Lilja

Department of Electrical and Computer Engineering
Minnesota Supercomputing Institute
University of Minnesota - Twin Cities



Abstract: The increasing gap between processor and memory speeds is one of the most difficult problems facing computer architects. In spite of the importance of this problem, relatively little background work has been done to examine the miss behavior of the dynamic loads, especially in the whole-program context. This study addresses that gap in knowledge by presenting the whole-program (vs. sampling) profiling results for load behavior.



Benchmarks Characteristics and Input Sets

Benchmarks



Methodology

  • All benchmarks were compiled with SimpleScalar's gcc (version 2.6.3) with full optimization (O3)
  • sim-outorder from the SimpleScalar Tool Suite was used (version 3.0, PISA)
  • All simulations were run to completion.


  • Machine Configurations

    Machine Configurations



    Results

    Histogram of the Average Number of Effective Addresses Touched by Each PC ( Explanation ):

  • Input Set A

  • Input Set B


  • Histogram of the Average Number of PCs that Touch Each Effective Address: ( Explanation ):

  • Input Set A

  • Input Set B


  • Distribution of Hits in the Memory Hierarchy ( Explanation ):

  • Input Set A ( Table , Graphs )
  • Input Set B ( Table , Graphs )

    Percentage of L1 Misses Accounted per Effective Address, In Order of Decreasing Number of L1 Misses per Effective Address ( Explanation ):

  • Input Set A

  • Input Set B

  • Percentage of L1 Misses Accounted per PC, In Order of Decreasing Number of L1 Misses per PC ( Explanation ):

  • Input Set A

  • Input Set B

  • Characteristics of the Top 64 EAs With the Most L1 Misses ( Explanation ):

  • Input Set A

  • Input Set B

  • Characteristics of the Top 64 EAs With the Most L2 Misses ( Explanation ):

  • Input Set A

  • Input Set B

  • Characteristics of the Top 64 PCs With the Most L1 Misses ( Explanation ):

  • Input Set A

  • Input Set B

  • Characteristics of the Top 64 PCs With the Most L2 Misses ( Explanation ):

  • Input Set A

  • Input Set B


  • Miscellaneous

    Here is the technical report for this work.

  • If you are interested in analyzing this data in more detail, please contact Professor David Lilja for more information. You can download sample output trace here. Due to the size of all the output traces (36GB compressed), we cannot make them available for FTP.


  • Created and Maintained by Joshua J. Yi
    Last Modified on 2228, 19 April 2002